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Triton Tool Suite enables the designer to quickly analyze and optimize software and hardware architectures in a SystemC environment. Time critical algorithms can then be easily migrated from software to hardware and efficient RTL automatically generated. Triton tools supports Xilinx MicroBlaze and PowerPC architectures in Sparton, Virtex II/Pro, and Virtex 4 platforms. The Triton tool suite is comprised of two tools, Tuner and Builder.

Triton Tool Suite

Triton Tuner

  • SystemC Co-simulation Environment
  • System Analysis Platform
  • Software optimization Platform
Triton Builder
  • Automated Hardware Acceleration Generation Tool
  • HW/SW partitioning
  • Accelerator model generation
  • Generates RTL, modified C code, and test benches for the accelerated system

With Tuner designers can quickly evaluate target hardware and software architectures and right size system resources for maximun cost/performance benefit. With Builder designers can move time critical algorithms to a hardware acceleration greatly increasing the performance of the embedded architecture. Builder creates a bus based accelerator which run automonous to the processor. For the Power PC architectures an optional APU architectures is offered interfacing the accelerator to the APU port of the PowerPC. The Triton tools suite is integrated with the Xilinx ISE and EDK embedded design tools. The architectural description as well as the application source code are imported from the Xilinx EDK environment. The designer can then verify the performance of the design and accelerate the a hardware acceleration and the generated accelerator RTL and modified C code are exported back providing an simple design flow. This provides the designers with a very efficient design flow maximizing the time the market savings provided by the Triton flow.

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