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Designers of today’s electronic systems face increasing time-to-market pressures, a greater availability of silicon area, and an increasing complexity of electronic systems due to their stringent performance, power, and cost requirements. To meet these staggering challenges, designers are now being forced to migrate to a higher level of abstraction.

This new level of abstraction is behavioral in nature. Often referred to as Electronic System Level (ESL) design, it takes the Register-Transfer Level (RTL) design methodology of the 1990s to a higher level.

By operating at a higher level of abstraction, designers are better able to explore the various design alternatives and perform optimizations on their algorithms. Using a SystemC simulation environment of the processor and peripherals the interaction between critical software and hardware subsystems can be optimized for efficient operation. This typically improves the power and performance of a complex system by orders of magnitude, and it enables a successful design solution to be reached much more rapidly, if it is even to be achieved at all.

Poseidon Design Systems offers a revolutionary new set of tools that assist with ESL design and verification tasks. These tools address the important problem of algorithm acceleration in electronic system design. They refine a design down to the level where the process can be continued with existing RTL design tools.

The large number of transistors available in today's SoCs means that there is space for powerful custom logic in addition to the processor cores and peripherals. For scalability and algorithm extensibility in this age of ever-changing standards, what goes into the custom logic and what runs on the processor is a crucial choice. Poseidon's innovative approach to software-hardware partitioning technology shortens the design cycles dramatically, while ensuring scalability and extensibility.

Read more on Poseidon's innovative Hardware/Software Partitioning technology.